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CS5343_08 Datasheet, PDF (1/22 Pages) Cirrus Logic – 98 dB, 96 kHz, Multi-Bit Audio A/D Converter
Draft
4/2/08
CS5343/4
98 dB, 96 kHz, Multi-Bit Audio A/D Converter
Features
 Advanced Multi-Bit ∆Σ Architecture
 24-bit Conversion
 Supports Audio Sample Rates Up to 108 kHz
 98 dB Dynamic Range at 5 V
 -92 dB THD+N at 5 V
 Low-Latency Digital Filter
 High-Pass Filter to Remove DC Offsets
 Single +3.3 V or +5 V Power Supply
 Power Consumption < 40 mW at 3.3 V
 Master or Slave Operation
 Slave Mode Speed Auto-Detect
 Master Mode Default Settings
 256x or 384x MCLK/LRCK Ratio
 CS5343 Supports I²S Audio Format
 CS5344 Supports Left-Justified Audio Format
General Description
The CS5343/4 is a complete analog-to-digital converter
for digital audio systems. It performs sampling, analog-
to-digital conversion, and anti-alias filtering, generating
24-bit values for both left and right inputs in serial form
at sample rates up to 108 kHz per channel.
The CS5343/4 uses a 3rd-order, multi-bit Delta-Sigma
modulator followed by a digital filter, which removes the
need for an external anti-alias filter.
The CS5343/4 also features a high-impedance sam-
pling network which eliminates costly external
components such as op-amps.
The CS5343/4 is available in a 10-pin TSSOP package
for both Commercial (-40° to +85° C) and Automotive
grades (-40° to +105° C). The CDB5343 Customer
Demonstration Board is also available for device evalu-
ation and implementation suggestions. Please refer to
the “Ordering Information” on page 20 for complete
details.
The CS5343/4 is ideal for audio systems requiring wide
dynamic range, negligible distortion and low noise, such
as set-top boxes, DVD-karaoke players, DVD record-
ers, A/V receivers, and automotive applications.
VA
3.3 V to 5 V
Single-Ended
Analog Input
High-Z
AINL Sampling
Network
FILT+
Internal
Reference
VQ Voltages
High-Pass
Filter
Low-Latency
Digital Filters
Single-Ended
Analog Input
High-Z
AINR Sampling
Network
High-Pass
Filter
Low-Latency
Digital Filters
Auto-detect
MCLK Divider
Master
Clock
Slave Mode
Auto-detect
SCLK
LRCK
SDOUT
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
April '08
DS687F3