CS48AU2B Datasheet, PDF (1/26 Pages) Cirrus Logic – Dedicated 32-bit Audio DSP for Audyssey Laboratories Technology

CS48AU2B Data Sheet
FEATURES
The brand new CS48AU2B device is still based on the same
‰ World’s first cost-effective, high-performance 32-bit DSP
high-performance 32-bit fixed point Digital Signal Processor
core but instead is equipped with much less memory, tailoring
that is solely dedicated to enable Audyssey Laboratories
it for more cost-effective applications which feature Audyssey
audio processing technologies for today’s high-volume
Laboratories audio processing technologies. Target
consumer electronic products
applications are:
‰ Features: Audyssey Dynamic Volume^TM, Audyssey Dynamic
— Digital Televisions
EQ^TM, Audyssey EQ^TM & Audyssey BassXT^TM/BassXT-TV^TM
— iPod^® Docking Stations
‰ Audyssey Dynamic Volume eliminates the need for
— Automotive Head Units (OEM and Aftermarket)
constant volume adjustments
‰ Audyssey Dynamic EQ enables a reference playback
experience at any desired playback level
‰ Audyssey EQ removes much of the distortion caused by
speaker enclosures and the typical room environment
producing greatly improved sound compared to similar
products without correction
‰ Audyssey BassXT and BassXT-TV are specifically
calibrated to enhance the physical bass response of each
product model
‰ Configurable Serial Audio Inputs/Outputs
— Maximum 32-bit @ 192 kHz
(Note: Audyssey Laboratories algorithms support 48 kHz,
— Automotive Outboard Amplifiers (OEM and Aftermarket)
— Blu-ray^® Disc Receivers
— Soundbars / Sound Projectors
T _{The following Audyssey Laboratories algorithms are currently}
supported on the CS48AU2B and more are in development:
F _{While the individual Audyssey processing algorithms have}
A _{already been implemented on this DSP, the CS48AU2B is}
programmed using the Cirrus proprietary DSP Composer^™
R ^{GUI development tool.}
Processing chains combining both standard signal
D ^{processing blocks (Tone Control, Bass Management, etc.) in}
44.1 kHz and 32 kHz)
— Integrated 192 kHz capable S/PDIF transmitter
‰ Integrated Clock Manager/PLL
L _{I — Can operate from external crystal, external oscillator}
‰ Input Fs Auto Detection & Coefficient Loading
IA ^{H ‰ Host Control & Boot via Serial Interface}
‰ Support for Master (Self) Boot via Serial EEPROM for
T ^{P single Fs applications (i.e. 48 kHz only via ADC input)}
‰ Configurable GPIOs and External Interrupt Input
N ^{L ‰ 1.8V Core and a 3.3V I/O that is tolerant to 5V input}
‰ Low-power Mode
E E — “Energy Star® Ready” via low-power mode, 268 µW in
standby
combination with any combination of Audyssey Laboratories
technology algorithm blocks may be designed using a simple
drag-and-drop interface to create a custom signal flow
specific to your product model. The end result of this is a
software image that is down-loaded to the DSP via serial host
(I²C^® or SPI^TM) or via a serial master (self) boot.
Support for loading of the various Audyssey Laboratories
algorithm coefficient files supplied by Audyssey Laboratories
is easily supported via DSP Composer, enabling the
OEM/ODM to quickly be able to generate the necessary files
for the system microcontroller which have been custom
tailored for each specific model based on the measurement
and analysis performed by Audyssey Laboratories.
Ordering Information:
See page 21 for ordering information
FID ^D _Multichannel
N ^{Audio In}
O S/PDIF
M u ltic ha nne l
C^{Audio Out}
Serial
Control 1
GPIO
32-bit
DSP
D
M
A
P
X
Y
Debug
W atchdog
TMR1
TMR2
PLL
http://www.cirrus.com
Copyright 2009 Cirrus Logic
CONFIDENTIAL
MAY ’09
DS876F3