CEU5175 Datasheet, PDF (3/4 Pages) Chino-Excel Technology – P-Channel Enhancement Mode Field Effect Transistor

CED5175/CEU5175
50
60
-V_GS=10,8,6,4V
40
48
30
-V_GS=3V
20
10
0
0 1.5 3 4.5 6 7.5 9
-VDS, Drain-to-Source Voltage (V)
Figure 1. Output Characteristics
36
24
12 _{TJ=125 C}
25 C
-55 C
0
0 0.8 1.6 2.4 3.2
4 4.8
-VGS, Gate-to-Source Voltage (V)
Figure 2. Transfer Characteristics
3600
3000
Ciss
2400
1800
1200
600
Coss
0 ^Crss
0
5
10
15
20
25
-VDS, Drain-to-Source Voltage (V)
Figure 3. Capacitance
1.3
V_DS=V_GS
1.2 ^ID^=-250µA
1.1
1.0
0.9
0.8
0.7
0.6
-50 -25 0 25 50 75 100 125 150
TJ, Junction Temperature( C)
Figure 5. Gate Threshold Variation
with Temperature
2.2
I_D=-20A
1.9 ^VGS=-10V
1.6
1.3
1.0
0.7
0.4
-100 -50 0 50 100 150 200
TJ, Junction Temperature( C)
Figure 4. On-Resistance Variation
with Temperature
10³ V_GS=0V
10²
10¹
10⁰
0.3 0.6 0.9 1.2 1.5 1.8
-VSD, Body Diode Forward Voltage (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3