CEP09N7G Datasheet, PDF (2/4 Pages) Chino-Excel Technology – N-Channel Enhancement Mode Field Effect Transistor

CEP09N7G/CEB09N7G
CEF09N7G
Electrical Characteristics Tc = 25 C unless otherwise noted
Parameter
Symbol
Test Condition
Min Typ Max Units
4
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics ^b
BV_DSS
I_DSS
I_GSSF
IGSSR
V_GS = 0V, I_D = 250µA
700
V_DS = 700V, V_GS = 0V
V_GS = 30V, V_DS = 0V
V_GS = -30V, V_DS = 0V
V
1
µA
100 nA
-100 nA
Gate Threshold Voltage
Static Drain-Source
On-Resistance
V_GS(th)
R_DS(on)
V_GS = V_DS, I_D = 250µA
2
4
V
V_GS = 10V, I_D = 4.5A
0.85 1.0
Ω
Dynamic Characteristics ^c
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics ^c
C_iss
C_oss
C_rss
V_DS = 25V, V_GS = 0V,
f = 1.0 MHz
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
t_d(on)
t_r
t_d(off)
V_DD = 200V, I_D = 5A,
V_GS = 10V, R_GEN = 9.1Ω
Turn-Off Fall Time
t_f
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q_g
Q_gs
V_DS = 480V, I_D = 5A,
V_GS = 10V
Q_gd
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage ^b
I_S ^f
V_SD
V_GS = 0V, I_S = 9A ^g
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature .
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% .
c.Guaranteed by design, not subject to production testing.
d.Limited only by maximum temperature allowed .
e.Pulse width limited by safe operating area .
f.Full package IS(max) = 6A .
g.Full package VSD test condition IS = 6A .
h.L = 15mH, IAS = 7.5A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C
1765
pF
200
pF
20
pF
24
ns
9
ns
72
ns
10
ns
46
nC
6.7
nC
18.5
nC
9
A
1.4
V
2