CEF04N6 Datasheet, PDF (2/5 Pages) Chino-Excel Technology – N-Channel Logic Level Enhancement Mode Field Effect Transistor

CEF04N6
ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted)
Parameter
Symbol
a
DRAIN-SOURCE AVALANCHE RATING
Condition
Min Typ Max Unit
Single Pulse Drain-Source
Avalanche Energy
Maximum Drain-Source
Avalanche Current
EAS
VDD =50V, L=27mH
RG=9.1Ω
IAS
500
mJ
6
4
A
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
BVDSS ^{VGS = 0V,ID = 250µA} 600
IDSS VDS = 600V, VGS = 0V
V
25 µA
Gate-Body Leakage
ON CHARACTERISTICS^a
IGSS VGS = Ć30V, VDS = 0V
Ć100 nA
Gate Threshold Voltage
VGS(th) VDS = VGS, ID = 250µA 2
4V
Drain-Source On-State Resistance RDS(ON) VGS =10V, ID = 2A
2.2 2.5 ^Ω
On-State Drain Current
ID(ON)
Forward Transconductance
g_FS
SWITCHING CHARACTERISTICS^b
VGS = 10V, VDS = 10V
VDS = 40V, ID = 2A
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
tD(ON) _{VDD =300V,}
tr
ID = 4A,
VGS = 10V
tD(OFF) _{RGEN=25Ω}
Fall Time
tf
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
Qgs
VDS =480V, ID = 4A,
VGS =10V
Qgd
6-123
4
A
2.8
S
25 50 ns
65 120 ns
75 150 ns
65 120 ns
24 31 nC
4
nC
11
nC