CEU6060R Datasheet, PDF (1/5 Pages) Chino-Excel Technology – N-Channel Logic Level Enhancement Mode Field Effect Transistor

CED6060R/CEU6060R
Feb. 2003
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
60V , 30A , RDS(ON)=25mΩ @VGS=10V.
D
6
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-251 & TO-252 package.
G
D
G
S
G
DS
CEU SERIES
TO-252AA(D-PAK)
CED SERIES
TO-251(l-PAK)
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous @TJ=125 C
-Pulsed
Drain-Source Diode Forward Current
Maximum Power Dissipation @Tc=25 C
Derate above 25 C
Operating and Storage Temperature Range
Symbol
VDS
VGS
ID
IDM
IS
PD
TJ, TSTG
Limit
60
ĆȀ20
30
120
30
50
0.3
-55 to 175
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
RįJC
3
C/W
Thermal Resistance, Junction-to-Ambient
RįJA
50
C/W
6-42