CEU04N65 Datasheet, PDF (1/4 Pages) Chino-Excel Technology – N-Channel Enhancement Mode Field Effect Transistor

CED04N65/CEU04N65
N-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
650V, 3.2A, R_DS(ON) = 2.8Ω @V_GS = 10V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
Lead-free plating ; RoHS compliant.
D
TO-251 & TO-252 package.
D
G
G
S
G
DS
CEU SERIES
TO-252(D-PAK)
CED SERIES
TO-251(I-PAK)
S
ABSOLUTE MAXIMUM RATINGS Tc = 25 C unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
V_DS
Gate-Source Voltage
V_GS
Drain Current-Continuous @ T_C = 25 C
@ T_C = 100 C
I_D
Drain Current-Pulsed ^a
I_DM
Maximum Power Dissipation @ T_C = 25 C
- Derate above 25 C
P_D
650
±30
3.2
2
12.8
70
0.56
Single Pulsed Avalanche Energy ^d
E_AS
220
Single Pulsed Avalanche Current ^d
I_AS
4.2
Operating and Store Temperature Range
T_J,T_stg
-55 to 150
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
Symbol
RθJC
RθJA
Limit
1.8
50
Units
V
V
A
A
A
W
W/ C
mJ
A
C
Units
C/W
C/W
This is preliminary information on a new product in development now .
Details are subject to change without notice .
1
Rev 1. 2012.Oct
http://www.cetsemi.com