CEU02N6 Datasheet, PDF (1/5 Pages) Chino-Excel Technology – N-Channel Logic Level Enhancement Mode Field Effect Transistor

CED02N6/CEU02N6
Dec. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
600V , 1.9A , RDS(ON)=5Ω @VGS=10V.
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-251 & TO-252 package.
G
D
G
S
CEU SERIES
TO-252AA(D-PAK)
G
DS
CED SERIES
TO-251(l-PAK)
D
6
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous (Tc=25 C)
ID
-Continuous (Tc=100 C)
ID
-Pulsed
IDM
Drain-Source Diode Forward Current
IS
Maximum Power Dissipation @Tc=25 C
Derate above 25 C
Operating and Storage Temperautre Range
PD
TJ, TSTG
Limit
600
Ć30
1.9
1.2
6
6
43
0.34
-55 to 150
Unit
V
V
A
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
RįJC
2.9
C/W
Thermal Resistance, Junction-to-Ambient
RįJA
50
C/W
6-77