CEP21A3 Datasheet, PDF (1/5 Pages) Chino-Excel Technology – N-Channel Logic Level Enhancement Mode Field Effect Transistor

CEP21A3/CEB21A3
Nov. 2002
4 ^{N-Channel Logic Level Enhancement Mode Field Effect Transistor} 4
FEATURES
D
30V , 20A , RDS(ON)=45mΩ @VGS=10V.
RDS(ON)=70mΩ @VGS=4.5V.
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-220 & TO-263 package.
G
D
G
GS
D
S
S
CEB SERIES
CEP SERIES
TO-263(DD-PAK)
TO-220
ABSOLUTE MAXIMUM RATINGS (TC=25 C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
-Pulsed
Drain-Source Diode Forward Current
Maximum Power Dissipation @Tc=25 C
Derate above 25 C
Operating and Storage Temperature Range
Symbol
VDS
VGS
ID
IDM
IS
PD
TJ, TSTG
Limit
30
Ć²⁰
20
60
20
43
0.29
-65 to 175
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
RįJC
3.5
C/W
Thermal Resistance, Junction-to-Ambient
RįJA
62.5
C/W
4-167