CEP18N5 Datasheet, PDF (1/4 Pages) Chino-Excel Technology – N-Channel Enhancement Mode Field Effect Transistor

CEP18N5/CEB18N5
CEF18N5
N-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
Type
CEP18N5
CEB18N5
CEF18N5
V_DSS
500V
500V
500V
R_DS(ON)
0.27Ω
0.27Ω
0.27Ω
I_D
18A
18A
18A ^d
@V_GS
10V
10V
10V
Super high dense cell design for extremely low RDS(ON).
D
High power and current handing capability.
Lead-free plating ; RoHS compliant.
D
G
G
G
G
S
CEB SERIES
D
S
CEP SERIES
D
S
CEF SERIES
S
TO-263(DD-PAK)
TO-220
TO-220F
ABSOLUTE MAXIMUM RATINGS Tc = 25 C unless otherwise noted
Parameter
Symbol
Limit
TO-220/263
TO-220F
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous @ T_C = 25 C
@ T_C = 100 C
Drain Current-Pulsed ^a
Maximum Power Dissipation @ T_C = 25 C
- Derate above 25 C
V_DS
V_GS
I_D
I_DM ^e
P_D
500
±30
18
18 ^d
11
11 ^d
72
72 ^d
219
74
1.8
0.6
Single Pulsed Avalanche Energy ^e
E_AS
859
Single Pulsed Avalanche Current ^e
I_AS
18
Operating and Store Temperature Range
T_J,T_stg
-55 to 150
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
Symbol
RθJC
RθJA
Limit
0.57
1.7
62.5
65
Units
V
V
A
A
A
W
W/ C
mJ
A
C
Units
C/W
C/W
This is preliminary information on a new product in development now .
Details are subject to change without notice .
1
Rev 1. 2013.Jan.
http://www.cetsemi.com