CED71A3 Datasheet, PDF (1/5 Pages) Chino-Excel Technology – N-Channel Logic Level Enhancement Mode Field Effect Transistor

CED71A3/CEU71A3
Dec. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
30V , 65A , RDS(ON)=10mΩ @VGS=10V.
RDS(ON)=14mΩ @VGS=5.0V.
Super high dense cell design for extremely low RDS(ON).
D
6
High power and current handling capability.
TO-252 & TO-251 package.
G
D
G
S
CEU SERIES
G
DS
CED SERIES
S
TO-252AA(D-PAK)
TO-251(l-PAK)
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
-Pulsed
Drain-Source Diode Forward Current
Maximum Power Dissipation @Tc=25 C
Derate above 25 C
Operating and Storage Temperature Range
Symbol
VDS
VGS
ID
IDM
IS
PD
TJ, TSTG
Limit
30
Ć20
65
100
65
69
0.56
-55 to 150
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
RįJC
1.8
C/W
Thermal Resistance, Junction-to-Ambient
RįJA
40
C/W
6-67