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CTLTVS5V0B Datasheet, PDF (1/6 Pages) Central Semiconductor Corp – LOW CAPACITANCE TRANSIENT VOLTAGE SUPPRESSOR
CTLTVS5V0B
SURFACE MOUNT SILICON
BI-DIRECTIONAL
LOW CAPACITANCE
TRANSIENT VOLTAGE SUPPRESSOR
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CTLTVS5V0B is
a low capacitance, ultra low leakage, fast response,
bi-directional TVS in the space saving TLM2D3D6 surface
mount package. This device is designed to protect
sensitive equipment connected to high speed data lines
against ESD damage.
MARKING CODE: 5
TLM2D3D6 CASE
APPLICATIONS:
• High speed data line protection
• User interface protection
• Charging/power port protection
• Serial/parallel port protection
FEATURES:
• Ultra space saving TLM2D3D6 package
• Low capacitance
• Ultra low leakage current
MAXIMUM RATINGS: (TA=25°C)
Peak Power Dissipation (8x20μs)
Electrical Fast Transient (IEC 61000-4-4) (5x50ns)
ESD Voltage (IEC 61000-4-2, Air)
ESD Voltage (IEC 61000-4-2, Contact)
Operating Junction Temperature
Storage Temperature
SYMBOL
PPK
EFT
VESD
VESD
TJ
Tstg
ELECTRICAL CHARACTERISTICS: (TA=25°C)
Maximum
Reverse
Stand-off
Voltage
VRWM
V
Breakdown
Voltage
VBR @ IT
MIN MAX
V
V
Test
Current
Maximum
Reverse
Leakage
Current
IT IR @ VRWM
mA
μA
5.0
5.5
10
1.0
0.1
Maximum
Clamping
Voltage
(8x20μs)
VC @ IPP
V
A
12
1.0
15
2.0
Notes: (1) Transmission Line Pulse (TLP) conditions: Z0=50Ω, tp=100ns
30
40
16
16
-55 to +125
-55 to +150
UNITS
W
A
kV
kV
°C
°C
Typical
TLP Clamping
Voltage
(Note 1)
VCL @ IPP
V
A
11
8.0
15
16
Typical
Dynamic
Resistance
(Note 1)
RDYN
Ω
Maximum
Junction
Capacitance
@ 0V Bias
CJ
pF
0.5
3.5
R5 (22-June 2015)