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CPS041 Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – Silicon Controlled Rectifier Sensitive Gate SCR Chip
PROCESS CPS041
Silicon Controlled Rectifier
Sensitive Gate SCR Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Cathode Bonding Pad Area
Gate Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
GLASS PASSIVATED MESA
41 x 41 MILS
8.7 MILS ± 0.6 MILS
18 x 8 MILS
7.1 x 7.1 MILS
Al - 45,000Å
Au - 10,000Å
GROSS DIE PER 4 INCH WAFER
6,474
PRINCIPAL DEVICE TYPES
CS18D
BRX49
CS92D
CS89M
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www.centralsemi.com
R1 (19 -May 2005)