CP741V Datasheet, PDF (1/1 Pages) Central Semiconductor Corp – Small Signal Transistors PNP - Low VCE(SAT) Transistor Chip

PROCESS CP741V
Small Signal Transistors
PNP - Low VCE(SAT) Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
Epitaxial Planar
18 x 18 MILS
7.1 MILS
3.8 x 3.8 MILS
3.8 x 3.8 MILS
Al/Si - 30,000Å
Au - 12,000Å
GROSS DIE PER 5 INCH WAFER
54,330
PRINCIPAL DEVICE TYPES
CMLT7410
CMPT7410
CMST7410
CMUT7410
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: [phone]
Fax: [phone]
www.centralsemi.com
R0 (5- January 2006)