CP710_10 Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – Small Signal Transistor PNP - High Voltage Transistor Chip

PROCESS CP710
Small Signal Transistor
PNP - High Voltage Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
26 x 26 MILS
9.0 MILS
6.1 x 4.9 MILS
5.2 x 5.2 MILS
Al - 30,000Å
Au - 18,000Å
GROSS DIE PER 4 INCH WAFER
17,130
PRINCIPAL DEVICE TYPES
CMPTA94
CXTA94
CZTA94
MPSA94
w w w. c e n t r a l s e m i . c o m
R5 (22-March 2010)