CP704_06 Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – Small Signal Transistors PNP - High Current Transistor Chip

PROCESS CP704
Small Signal Transistors
PNP - High Current Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
22 x 22 MILS
9.0 MILS
3.7 X 3.7 MILS
4.2 X 4.2 MILS
Al - 30,000Å
Au - 18,000Å
GROSS DIE PER 4 INCH WAFER
23,450
PRINCIPAL DEVICE TYPES
MPSA55
MPSA56
BACKSIDE COLLECTOR
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: [phone]
Fax: [phone]
www.centralsemi.com
R2 (23 -August 2006)