CP635 Datasheet, PDF (1/1 Pages) Central Semiconductor Corp – Power Transistor PNP - High Current Transistor Chip

PROCESS CP635
Power Transistor
PNP - Silicon Power Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
GLASS PASSIVATED MESA
106 x 106 MILS
12 MILS
25 x 33 MILS
30 x 36 MILS
Al - 50,000Å
Ag - 10,000Å
GROSS DIE PER 4 INCH WAFER
920
PRINCIPAL DEVICE TYPE
MJ2955
BACKSIDE COLLECTOR R0
w w w. c e n t r a l s e m i . c o m
R1 (29-April 2010)