CP349 Datasheet, PDF (1/1 Pages) Central Semiconductor Corp – Power Transistor NPN- High Voltage Transistor Chip

PROCESS CP349
Power Transistor
NPN- High Voltage Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
51 x 51 MILS
9.1 MILS
7.9 x 15.7 MILS
7.9 x 15.7 MILS
Al - 30,000Å
Ti/Ni/Ag - 2000Å/3000Å/20000Å
GROSS DIE PER 5 INCH WAFER
6,480
PRINCIPAL DEVICE TYPES
BUY49S
BSW68
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: [phone]
Fax: [phone]
www.centralsemi.com
R0 (12 - June 2006)