CP341V_10 Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – Small Signal Transistors NPN - Low VCE(SAT) Transistor Chip

PROCESS CP341V
Small Signal Transistors
NPN - Low VCE(SAT) Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
18 x 18 MILS
7.1 MILS
3.8 x 3.8 MILS
3.8 x 3.8 MILS
Al/Si - 30,000Å
Au - 12,000Å
GROSS DIE PER 5 INCH WAFER
54,330
PRINCIPAL DEVICE TYPES
CMLT3410
CMPT3410
CMST3410
CMUT3410
CXT3410
w w w. c e n t r a l s e m i . c o m
R2 (22-March 2010)