CP329V Datasheet, PDF (1/1 Pages) Central Semiconductor Corp – Small Signal Transistor NPN- Silicon Darlington Transistor Chip

PROCESS CP329V
Small Signal Transistor
NPN- Silicon Darlington Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
27 x 27 MILS
7.1 MILS
4.2 x 4.2 MILS
4.3 x 4.3 MILS
Al - 30,000Å
Au - 13,000Å
GROSS DIE PER 4 INCH WAFER
15,980
PRINCIPAL DEVICE TYPES
CMPTA29
CZTA29
MPSA29
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: [phone]
Fax: [phone]
www.centralsemi.com
R0 (20 -January 2006)