CP323 Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – Small Signal Transistor NPN - Darlington Transistor Chip

PROCESS CP323
Small Signal Transistor
NPN - Darlington Transistor Chip
Central^TM
Semiconductor Corp.
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
26.8 x 26.8 MILS
9.0 MILS
4.2 x 4.2 MILS
4.3 x 4.3 MILS
Al -
Au - 18,000Å
GROSS DIE PER 4 INCH WAFER
15,900
PRINCIPAL DEVICE TYPES
BSS52
BST52
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: [phone]
Fax: [phone]
www.centralsemi.com
R1 (1-August 2002)