CP314V Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – NPN - High Current Transistor Chip

PROCESS CP314V
Small Signal Transistor
NPN - High Current Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
40 x 40 MILS
7.1 MILS
7.9 x 8.7 MILS
9.0 x 14 MILS
Al - 30,000Å
Au-As - 13,000Å
GROSS DIE PER 5 INCH WAFER
10,583
PRINCIPAL DEVICE TYPES
CBCP68
CBCX68
CMPT651
CZT651
MPS650
MPS651
w w w. c e n t r a l s e m i . c o m
R1 (22-March 2010)