CP307_10 Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – Small Signal Transistor NPN - Silicon Darlington Transistor Chip

PROCESS CP307
Small Signal Transistor
NPN - Silicon Darlington Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
EPITAXIAL PLANAR
27 x 27 MILS
9.0 MILS
5.3 x 3.8 MILS
5.3 x 6.5 MILS
Al - 30,000Å
Au - 18,000Å
GEOMETRY
BACKSIDE COLLECTOR
GROSS DIE PER 4 INCH WAFER
15,165
PRINCIPAL DEVICE TYPES
2N6426
2N6427
CMPT6427
CMPTA13
CMPTA14
CXTA14
CZTA14
MPSA13
MPSA14
MPSA27
w w w. c e n t r a l s e m i . c o m
R6 (22-March 2010)