CP302 Datasheet, PDF (1/2 Pages) Central Semiconductor Corp – Small Signal Transistor NPN - Silicon RF Transistor Chip

PROCESS CP302
Small Signal Transistor
NPN - Silicon RF Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
14.5 x 14.5 MILS
9.0 MILS
2.3 x 2.3 MILS
2.5 x 2.3 MILS
Al - 30,000Å
Au - 18,000Å
GROSS DIE PER 4 INCH WAFER
53,730
PRINCIPAL DEVICE TYPES
MPSH10
MPSH11
CMPTH10
CMPTH11
w w w. c e n t r a l s e m i . c o m
R3 (22-March 2010)