CP229 Datasheet, PDF (1/1 Pages) Central Semiconductor Corp – Small Signal Transistors NPN - RF Transistor Chip

PROCESS CP229
Small Signal Transistors
NPN - RF Transistor Chip
PROCESS DETAILS
Process
Die Size
Die Thickness
Base Bonding Pad Area
Emitter Bonding Pad Area
Top Side Metalization
Back Side Metalization
GEOMETRY
EPITAXIAL PLANAR
21.7 x 21.7 MILS
8.7 MILS
3.2 MILS Diameter
3.4 x 3.4 MILS
Al - 10,000Å
Au - 10,000Å
GROSS DIE PER 4 INCH WAFER
17,000
PRINCIPAL DEVICE TYPES
2N5109
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: [phone]
Fax: [phone]
www.centralsemi.com
R0 (23- September 2005)