CP210-2N4416 Datasheet, PDF (1/4 Pages) Central Semiconductor Corp – N-Channel JFET Die

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CP210-2N4416
N-Channel JFET Die
The CP210-2N4416 is a silicon N-Channel JFET designed for VHF amplifier and mixer
applications.
G
D
S
BACKSIDE GATE
MECHANICAL SPECIFICATIONS:
Die Size
15 x 15 MILS
Die Thickness
8.0 MILS
Drain Bonding Pad Size
3.2 x 4.0 MILS
Source Bonding Pad Size 3.2 x 4.0 MILS
Gate Bonding Pad Size
3.2 x 4.0 MILS
Top Side Metalization
Al – 30,000Å
Back Side Metalization
Au – 6,000Å
Scribe Alley Width
3.0 MILS
Wafer Diameter
5 INCHES
Gross Die Per Wafer
72,000
R1
MAXIMUM RATINGS: (TA=25°C)
Gate-Drain Voltage
Gate-Source Voltage
Drain-Source Voltage
Gate Current
Operating and Storage Junction Temperature
SYMBOL
VGD
VGS
VDS
IG
TJ, Tstg
ELECTRICAL CHARACTERISTICS: (TA=25°C)
SYMBOL TEST CONDITIONS
MIN
IGSS
VGS=20V, VDS=0
IDSS
VDS=20V, VGS=0
5.0
BVGSS IG=1.0μA
30
VGS(OFF) VDS=15V, ID=1.0nA
gFS
VDS=15V, VGS=0, f=1.0kHz
4.5
gOS
VDS=15V, VGS=0, f=1.0kHz
Crss
VDS=15V, VGS=0, f=1.0MHz
Ciss
VDS=15V, VGS=0, f=1.0MHz
Coss
VDS=15V, VGS=0, f=1.0MHz
NF
VDS=15V, ID=5.0mA, RG=1.0kΩ, f=100MHz
30
30
30
10
-65 to +150
MAX
0.1
15
6.0
7.5
50
1.0
4.0
2.0
2.0
UNITS
V
V
V
mA
°C
UNITS
nA
mA
V
V
mS
μS
pF
pF
pF
dB
R1 (9-February 2016)