CMLDM7003TG_15 Datasheet, PDF (1/4 Pages) Central Semiconductor Corp – SURFACE MOUNT SILICON DUAL N-CHANNEL ENHANCEMENT-MODE MOSFET

CMLDM7003TG
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFET
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMLDM7003TG
is a dual N-Channel enhancement-mode MOSFET,
manufactured by the N-Channel DMOS Process,
designed for high speed pulsed amplifier and driver
applications. This device offers low rDS(ON), low
VGS(th), and ESD protection up to 2kV.
MARKING CODE: CTG
SOT-563 CASE
• Device is Halogen Free by design
MAXIMUM RATINGS: (TA=25°C)
Drain-Source Voltage
Drain-Gate Voltage
Gate-Source Voltage
Continuous Drain Current
Maximum Pulsed Drain Current
Power Dissipation (Note 1)
Power Dissipation (Note 2)
Power Dissipation (Note 3)
Operating and Storage Junction Temperature
Thermal Resistance
SYMBOL
VDS
VDG
VGS
ID
IDM
PD
PD
PD
TJ, Tstg
Θ_JA
50
50
12
280
1.5
350
300
150
-65 to +150
357
UNITS
V
V
V
mA
A
mW
mW
mW
°C
°C/W
ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
IGSSF, IGSSR VGS=5.0V
50
IGSSF, IGSSR VGS=10V
0.5
IGSSF, IGSSR VGS=12V
1.0
IDSS
VDS=50V, VGS=0
50
BVDSS
VGS=0, ID=10μA
50
VGS(th)
VDS=VGS, ID=250μA
0.7
1.2
VSD
VGS=0, IS=115mA
1.4
rDS(ON)
VGS=1.8V, ID=50mA
1.6
2.3
rDS(ON)
VGS=2.5V, ID=50mA
1.3
1.9
rDS(ON)
VGS=5.0V, ID=50mA
1.1
1.5
gFS
VDS=10V, ID=200mA
200
Crss
VDS=25V, VGS=0, f=1.0MHz
5.0
Ciss
VDS=25V, VGS=0, f=1.0MHz
50
Coss
VDS=25V, VGS=0, f=1.0MHz
25
Qg(tot)
VDS=25V, VGS=4.5V, ID=100mA
0.764
Qgs
VDS=25V, VGS=4.5V, ID=100mA
0.148
Qgd
VDS=25V, VGS=4.5V, ID=100mA
0.156
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm²
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm²
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm²
UNITS
nA
μA
μA
nA
V
V
V
Ω
Ω
Ω
mS
pF
pF
pF
nC
nC
nC
R5 (8-June 2015)