|
NESG2031M05 Datasheet, PDF (1/13 Pages) NEC – NECs NPN SiGe HIGH FREQUENCY TRAN SIS TOR | |||
|
NPN SiGe RF TRANSISTOR
NESG2031M05
NEC's NPN SiGe
HIGH FREQUENCY TRANSISTOR
FEATURES
⢠HIGH BREAKDOWN VOLTAGE SiGe TECHNOLOGY
VCEO = 5 V (Absolute Maximum)
⢠LOW NOISE FIGURE:
NF = 0.8 dBm at 2 GHz
NF = 1.3 dBm at 5.2 GHz
⢠HIGH MAXIMUM STABLE GAIN:
MSG = 21.5 dB at 2 GHz
⢠LOW PROFILE M05 PACKAGE:
SOT-343 footprint, with a height of only 0.59 mm
Flat lead style for better RF performance
M05
⢠Pb Free Available (-A)
DESCRIPTION
NEC's NESG2031M05 is fabricated using NECʼs high voltage Silicon Germanium process (UHS2-HV), and is designed for a wide
range of applications including low noise ampliï¬ers, medium power ampliï¬ers, and oscillators.
NECʼs low proï¬le, ï¬at lead style M05 Package provides high frequency performance for compact wireless designs.
ELECTRICAL CHARACTERISTICS (TA = 25°C)
PART NUMBER
PACKAGE OUTLINE
NESG2031M05
M05
SYMBOLS
PARAMETERS AND CONDITIONS
UNITS
MIN
TYP
MAX
NF
Noise Figure at VCE = 2 V, IC = 5 mA, f = 5.2 GHz,
dB
1.3
ZS = ZSOPT, ZL = ZLOPT
Ga
Associated Gain at VCE = 2 V, IC = 5 mA, f = 5.2 GHz,
dB
ZS = ZSOPT, ZL = ZLOPT
10.0
NF
Noise Figure at VCE = 2 V, IC = 5 mA, f = 2 GHz,
dB
0.8
1.1
ZS = ZSOPT, ZL = ZLOPT
Ga
MSG
|S21E|2
Associated Gain at VCE = 2 V, IC = 5 mA, f = 2 GHz,
ZS = ZSOPT, ZL = ZLOPT
Maximum Stable Gain1 at VCE = 3 V, IC = 20 mA, f = 2 GHz
Insertion Power Gain at VCE = 3 V, IC = 20 mA, f = 2 GHz
dB
15.0
17.0
dB
19.0
21.5
dB
16.0
18.0
P1dB
Output Power at 1dB Compression Point at
VCE = 3 V, IC = 20 mA, f = 2 GHz
dBm
13
OIP3
Output 3rd Order Intercept Point at VCE = 3 V, IC = 20 mA, f = 2 GHz dBm
23
fT
Gain Bandwidth Product at VCE = 3 V, IC = 20 mA, f = 2 GHz
GHz
20
Cre
Reverse Transfer Capacitance2 at VCB = 2 V, IC = 0 mA, f = 1 GHz
pF
25
0.15
0.25
ICBO
Collector Cutoff Current at VCB = 5V, IE = 0
nA
100
IEBO
Emitter Cutoff Current at VEB = 1 V, IC = 0
hFE
DC Current Gain3 at VCE = 2 V, IC = 5 mA
nA
130
100
190
260
Notes:
1. MSG = S21
S12
2. Collector to base capacitance is measured by capacitance meter (automatic balance bridge method) when emitter pin is connected to the guard pin.
3. Pulsed measurement, pulse width ⤠350 μs, duty cycle ⤠2 %.
The information in this document is subject to change without notice. Before using this document, please confirm
that this is the latest version.
Date Published: June 22, 2005
|
▷ |