|
NE5511279A Datasheet, PDF (1/4 Pages) California Eastern Labs – 7.5 V UHF BAND RF POWER SILICON LD-MOS FET | |||
|
RF
NEC'S 7.5
POWER SILICON
V UHF BAND
LD-MOS FET
NE5511279A
FEATURES
⢠HIGH OUTPUT POWER:
Pout = 40.0 dBm TYP., f = 900 MHz, VDS = 7.5 V,
Pout = 40.5 dBm TYP., f = 460 MHz, VDS = 7.5 V,
⢠HIGH POWER ADDED EFFICIENCY:
ηadd = 48% TYP., f = 900 MHz, VDS = 7.5 V,
ηadd = 50% TYP., f = 460 MHz, VDS = 7.5 V,
⢠HIGH LINEAR GAIN:
GL = 15.0 dB TYP., f = 900 MHz, VDS = 7.5 V,
GL = 18.5 dB TYP., f = 460 MHz, VDS = 7.5 V,
⢠SURFACE MOUNT PACKAGE:
5.7 x 5.7 x 1.1 mm MAX
⢠SINGLE SUPPLY:
VDS = 2.8 to 8.0 V
OUTLINE DIMENSIONS (Units in mm)
PACKAGE OUTLINE 79A
4.2 MAX.
Source
(Bottom View)
1.5±0.2
Source
Gate
Drain
Gate
Drain
0.4±0.15
5.7 MAX.
0.8 MAX.
3.6±0.2
APPLICATIONS
⢠UHF RADIO SYSTEMS
⢠CELLULAR REPEATERS
⢠TWO-WAY RADIOS
⢠FRS/GMRS
⢠FIXED WIRELESS
DESCRIPTION
NEC's NE5511279A is an N-Channel silicon power laterally
diffused MOSFET specially designed as the transmission
power ampliï¬er for 7.5 V radio systems. Die are manu-
factured using NEC's NEWMOS1 technology and housed in
a surface mount package. This device can deliver 40.0 dBm
output power with 48% power added efï¬ciency at 900 MHz
using a 7.5 V supply voltage.
ELECTRICAL CHARACTERISTICS (TA = 25°C)
SYMBOL
PARAMETER
MIN
TYP
MAX UNIT
TEST CONDITIONS
Pout
ID
ηadd
GL
Pout
ID
ηadd
GL
IGSS
IDSS
Vth
Rth
gm
BVDSS
Output Power
Drain Current
Power Added Efï¬ciency
Linear Gain
Output Power
Drain Current
Power Added Efï¬ciency
Linear Gain
Gate to Source Leak Current
Drain to Source Leakage Current
(Zero Gate Voltage Drain Current)
Gate Threshold Voltage
Thermal Resistance
Transconductance
Drain to Source Breakdown Voltage
38.5
â
42
â
â
â
â
â
â
â
1.0
â
â
20
40.0
2.5
48
15.0
40.5
2.75
50
18.5
â
â
1.5
5
2.3
24
â
dBm f = 900 MHz, VDS = 7.5 V,
â
A Pin = 27 dBm,
â
% IDSQ = 400 mA (RF OFF)
â
dB Pin = 5 dBm
â
dBm f = 460 MHz, VDS = 7.5 V,
â
A Pin = 25 dBm,
â
% IDSQ = 400 mA (RF OFF)
â
dB Pin = 5 dBm
100
nA VGS = 6.0 V
100
nA VDS = 8.5 V
2.0
V VDS = 4.8 V, IDS = 1.5 mA
â
°C/W Channel to Case
â
S VDS = 3.5 V, IDS = 900 mA
â
V IDSS = 15 μA
Notes:
DC performance is 100% tested. RF performance is tested on several samples per wafer.
Wafer rejection criteria for standard devices is 1 reject for several samples.
California Eastern Laboratories
|
▷ |