NE32500 Datasheet, PDF (1/3 Pages) NEC – C to Ka BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET CHIP

NEC's C TO KA BAND
SUPER LOW NOISE AMPLIFIER NE32500
N-CHANNEL HJ FET CHIP
FEATURES
• SUPER LOW NOISE FIGURE:
0.45 dB TYP at 12 GHz
• HIGH ASSOCIATED GAIN:
12.5 dB TYP at 12 GHz
• GATE LENGTH: LG = 0.20 µm
• GATE WIDTH: WG = 200 µm
DESCRIPTION
NEC's NE32500 is a Hetero-Junction FET chip that uses the
junction between Si-doped AlGaAs and undoped InGaAs to
create very high mobility electrons. Its excellent low noise figure
and high associated gain make it suitable for commercial
systems and industrial applications.
NEC's stringent quality assurance and test procedures assure
the highest reliability and performance.
OUTLINE DIMENSIONS (Units in µm)
CHIP
5.5
36.5
58
13
66
25
25
38
13
89
Drain
68
350
76.5
Source
Source
100.5
Gate
60
21
46.5
25
25
66
49.5 43
13
350
Thickness = 140 µm
Bonding Area
ELECTRICAL CHARACTERISTICS (TA = 25°C)
SYMBOLS
PART NUMBER
PACKAGE OUTLINE
PARAMETERS AND CONDITIONS
NF
Noise Figure, VDS = 2 V, IDS = 10 mA, f = 12 GHz
GA
Associated Gain, VDS = 2 V, IDS = 10 mA, f = 12 GHz
IDSS
Saturated Drain Current, VDS = 2 V,VGS = 0 V
gm
Transconductance, VDS = 2 V, ID = 10 mA
IGSO
Gate to Source Leakage Current, VGS = -3 V
VGS(off)
Gate to Source Cutoff Voltage, VDS = 2 V, ID = 100 µA
RTH (CH-C) Thermal Resistance¹ (Channel to Case)
Note:
1. RF performance is determined by packaging and testing 10 chips per wafer.
Wafer rejection criteria for standard devices is 2 rejects per 10 samples.
UNITS
dB
dB
mA
mS
µA
V
°C/W
NE32500
00 (Chip)
MIN
TYP
0.45
11.0
12.5
20
60
45
60
0.5
-0.2
-0.7
MAX
0.55
90
10.0
-2.0
260
California Eastern Laboratories