CAT661_07 Datasheet, PDF (9/17 Pages) Catalyst Semiconductor – High Frequency 100mA CMOS Charge Pump, Inverter/Doubler

CAT661
CAPACITOR SELECTION
Low ESR capacitors are necessary to minimize voltage
losses, especially at high load currents. The exact
values of C1 and C2 are not critical but low ESR
capacitors are necessary.
The ESR of capacitor C1, the pump capacitor, can have
a pronounced effect on the output. C1 currents are
approximately twice the output current and losses occur
on both the charge and discharge cycle. The ESR
effects are thus multiplied by four. A 0.5Ω ESR for C1 will
have the same effect as a 2Ω increase in CAT661 output
impedance.
Output voltage ripple is determined by the value of C2
and the load current. C2 is charged and discharged at a
current roughly equal to the load current. The internal
switching frequency is one-half the oscillator frequency.
VRIPPLE = IOUT/(FOSC x C2) + IOUT x ESRC2
For example, with a 25kHz oscillator frequency (12.5kHz
switching frequency), a 150µF C2 capacitor with an ESR
of 0.2Ω and a 100mA load peak-to-peak the ripple
voltage is 45mV.
VRIPPLE vs. FOSC
VRIPPLE (mV) IOUT (mA)
45
100
25
100
FOSC (kHz)
25
135
C2 (µF)
150
150
C2 ESR (Ω)
0.2
0.2
Figure 6. Oscillator
V+
BOOST/FC
(1)
7.0 I
I
OSC
(7)
~18pF
7.0 I
I
LV
(6)
Figure 7. External Clocking
REQUIRED FOR TTL LOGIC
NC
+
C1
1
BOOST/FC
8
V+
2
7
CAP+
OSC
3
CAT661 ₆
GND
LV
4 _CAP-
OUT ⁵
100k
-V+
C2
+
V+
OSC INPUT
9
Doc. No. MD-5003, Rev. K