CAT705 Datasheet, PDF (7/14 Pages) Catalyst Semiconductor – μP Supervisory Circuits

CAT705, CAT706, CAT813
FUNCTIONAL DESCRIPTION
PROCESSOR RESET
The CAT705, CAT706 & CAT813 detect supply
voltage (V_CC) conditions that are below the specified
voltage trip value (V_RST) and provide a reset output to
maintain correct system operation. On power-up,
R¯¯E¯S¯E¯T¯ (or RESET for the CAT813) are kept active for
a minimum delay t_RP of 140ms after the supply voltage
(V_CC) rises above V_RST to allow the power supply and
processor to stabilize. When V_CC drops below the
voltage trip value (V_RST), the reset output signals
R¯¯E¯S¯E¯T¯ (or RESET) are pulled active. R¯¯E¯S¯E¯T¯ (or
RESET) is specifically designed to provide the reset
input signals for processors. This provides reliable
and consistent operation as power is turned on, off or
during brownout conditions by maintaining the
processor operation in known conditions.
MANUAL RESET
The CAT705, CAT706 & CAT813 each have a Manual
Reset (¯M¯R¯) input to allow for alternative control of the
reset outputs. The ^{¯M¯R¯} input is designed for direct
connection to a pushbutton (see Figure 1). The ^{¯M¯R¯}
input is internally pulled up by 52kΩ resistor and must
be pulled low to cause the reset outputs to go active.
Internally, this input is debounced and timed such that
R¯¯E¯S¯E¯T¯ (or RESET) signals of at least 140ms
minimum will be generated. The min 140ms t_RP delay
commences as the Manual Reset input is released
from the low level. (see Figure 2)
MR
RESET
RESET
MR
WDO
V_CC
GND
PFI
CAT705
CAT706
CAT813
RESET/RESET
WDI
PFO
Figure 1. Pushbutton RESET
t_PB
t_PDLY
V_IL
V_IH
t_RP
V_OH
V_OL
Figure 2. Timing Diagram – Pushbutton RESET
© Catalyst Semiconductor, Inc.
7
Characteristics subject to change without notice
Doc. No. MD-3030, Rev. A