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Figure 1: Synchronous Data Timing
VIH
CS
SCK
VIL
tCSS
VIH
VIL
VIH
SI
VIL
tWH
tSU
tH
VALID IN
VOH
SO
VOL
HI-Z
Figure 2: H¯¯O¯L¯D¯ Timing
CS
SCK
HOLD
SO
tCD
tHD
tHZ
CAT5411
tCS
tCSH
tWL
tRI
tFI
tV
tHO
tDIS
HI-Z
tCD
tHD
HIGH IMPEDANCE
tLZ
© Catalyst Semiconductor, Inc.
7
Characteristics subject to change without notice
Doc. No. MD-2114 Rev. I
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