CAT25080 Datasheet, PDF (7/17 Pages) Catalyst Semiconductor – 8-Kb and 16-Kb SPI Serial CMOS EEPROM

Byte Write
Once the WEL bit is set, the user may execute a write
sequence, by sending a WRITE instruction, a 16-bit
address and data as shown in Figure 4. Only 10
significant address bits are used by the CAT25080 and
11 by the CAT25160. The rest are don’t care bits, as
shown in Table 5. Internal programming will start after
the low to high C¯¯S transition. During an internal write
cycle, all commands, except for RDSR (Read Status
Register) will be ignored. The ¯R¯D¯Y¯ bit will indicate if the
internal write cycle is in progress (¯R¯D¯Y¯ high), or the the
device is ready to accept commands (¯R¯D¯Y¯ low).
CAT25080, CAT25160
Page Write
After sending the first data byte to the CAT25080/160,
the host may continue sending data, up to a total of 32
bytes, according to timing shown in Figure 5. After each
data byte, the lower order address bits are automatically
incremented, while the higher order address bits (page
address) remain unchanged. If during this process the
end of page is exceeded, then loading will “roll over” to
the first byte in the page, thus possibly overwriting
previoualy loaded data. Following completion of the
write cycle, the CAT25080/160 is automatically returned
to the write disable state.
Table 5. Byte Address
Device
CAT25080
CAT25160
Address Significant Bits
A9 - A0
A10 - A0
Address Don't Care Bits
A15 - A10
A15 - A11
# Address Clock Pulse
16
16
Figure 4. Byte WRITE Timing
CS
SCK
012345678
21 22 23 24 25 26 27 28 29 30 31
OPCODE
BYTE ADDRESS*
DATA IN
SI
0 0 0 0 0 0 1 0 ^AN
A0 _{D7 D6 D5 D4 D3 D2 D1 D0}
SO
HIGH IMPEDANCE
* Please check the Byte Address Table (Table 5)
Note: Dashed Line = mode (1, 1) - - - - - -
Figure 5. Page WRITE Timing
CS
SCK
SI
012345678
21 22 23 24-31 32-39 ^{24+(N-1)x8-1..24+(N-1)x8 24+Nx8-1}
OPCODE
00 00 00
BYTE ADDRESS*
DATA IN
1 0 A_N
Data Data Data
A_{0 Byte 1 Byte 2 Byte 3}
Data Byte N
7..1
0
HIGH IMPEDANCE
SO
*Please check the Byte Address Table. (Table 5)
Note: Dashed Line = mode (1, 1) - - - - - -
© 2006 Catalyst Semiconductor, Inc.
7
Characteristics subject to change without notice
Doc. No. 1122 Rev. A