CAT803 Datasheet, PDF (6/14 Pages) Catalyst Semiconductor – 3-Pin Microprocessor Power Supply Supervisors

CAT803, CAT809, CAT810
DETAILED DESCRIPTIONS
RESET TIMING
The reset signal is asserted LOW for the CAT803/
CAT809 and HIGH for the CAT810 when the power
supply voltage falls below the threshold trip voltage and
remains asserted for at least 140ms after the power
supply voltage has risen above the threshold.
V_CC
5V
V_TH
0V
T_D
5V
RESET
0V
T_R
(140msec
minimum)
CAT803, CAT809
5V
RESET
0V
CAT810
Figure 1. Reset Timing Diagram
V_CC Transient Response
The CAT803/CAT809/CAT810 protect µPs against
brownout failure. Short duration transients of 4µsec
or less and 100mV amplitude typically do not cause a
false RESET.
Figure 2 shows the maximum pulse duration of negative-
going V_CC transients that do not cause a reset condition.
As the amplitude of the transient goes further below
the threshold (increasing V_TH - V_CC), the maximum
pulse duration decreases. In this test, the V_CC starts
from an initial voltage of 0.5V above the threshold and
drops below it by the amplitude of the overdrive voltage
(V_TH - V_CC).
Figure 2. Maximum Transient Duration Without Causing a Reset Pulse vs. Reset Comparator Overdrive
Doc. No. 3004, Rev. X

© 2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice