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CAT28F010 Datasheet, PDF (6/14 Pages) Catalyst Semiconductor – 1 Megabit CMOS Flash Memory
CAT28F010
A.C. CHARACTERISTICS, Read Operation
VCC = +5V ±10%, unless otherwise specified.
\JEDEC Standard
Symbol Symbol Parameter
tAVAV
tAVWL
tWLAX
tDVWH
tWHDX
tELWL
tWHEH
tWLWH
tWHWL
tWHWH1(2)
tWHWH2(2)
tWHGL
tWC
tAS
tAH
tDS
tDH
tCS
tCH
tWP
tWPH
-
-
-
Write Cycle Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
CE Setup Time
CE Hold Time
WE Pulse Width
WE High Pulse Width
Program Pulse Width
Erase Pulse Width
Write Recovery Time
Before Read
tGHWL
Read Recovery Time
-
Before Write
tVPEL
-
VPP Setup Time to CE
28F010-70 28F010-90 28F010-12
Min. Max
70
0
40
40
10
0
0
40
20
10
9.5
Min. Max.
90
0
40
40
10
0
0
40
20
10
9.5
Min. Max. Unit
120
ns
0
ns
40
ns
40
ns
10
ns
0
ns
0
ns
40
ns
20
ns
10
µs
9.5
ms
6
6
6
µs
0
0
0
µs
100
100
100
ns
ERASE AND PROGRAMMING PERFORMANCE (1)
Parameter
28F010-55
28F010-70
Min. Typ. Max. Min. Typ. Max.
Chip Erase Time (3)(5)
0.5 10
0.5 10
Chip Program Time (3)(4)
2 12.5
2 12.5
28F010-90
Min. Typ. Max
0.5 10
2 12.5
28F010-12
Min. Typ. Max. Unit
0.5 10 Sec
2 12.5 Sec
Note:
(1) Please refer to Supply characteristics for the value of VPPH and VPPL. The VPP supply can be either hardwired or switched. If VPP is
switched, VPPL can be ground, less than VCC + 2.0V or a no connect with a resistor tied to ground.
(2) Program and Erase operations are controlled by internal stop timers.
(3) ‘Typicals’ are not guaranteed, but based on characterization data. Data taken at 25°C, 12.0V VPP.
(4) Minimum byte programming time (excluding system overhead) is 16 µs (10 µs program + 6 µs write recovery), while maximum is 400 µs/
byte (16 µs x 25 loops). Max chip programming time is specified lower than the worst case allowed by the programming algorithm since
most bytes program significantly faster than the worst case byte.
(5) Excludes 00H Programming prior to Erasure.
Doc. No. 25005-0A 2/98 F-1
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