CAT24C44 Datasheet, PDF (6/8 Pages) Catalyst Semiconductor – 256-Bit Serial Nonvolatile CMOS Static RAM

CAT24C44
WREN/WRDS
The CAT24C44 powers up in the program disable state
(the “write enable latch” is reset). Any programming
after power-up or after a WRDS (RAM write/E²PROM
store disable) instruction must first be preceded by the
WREN (RAM write/E²PROM store enable) instruction.
Once writing/storing is enabled, it will remain enabled
until power to the device is removed, the WRDS instruc-
tion is sent, or an E²PROM store has been executed
(STO). The WRDS (write/store disable) can be used to
disable all CAT24C44 programming functions, and will
prevent any accidental writing to the RAM, or storing to
the E²PROM.
Data can be read normally from the CAT24C44 regard-
less of the “write enable latch” status.
Figure 3. Read Cycle Timing
SK CYCLE # 6
7
8
SK
VIH
CE
DI
tPD
HIGH-Z
DO
Figure 4. Write Cycle Timing
tSKH
1/FSK
tSKL
SK
x
1
2
tCES
CE
tDS
tDH
DI
9
10
11
tPD
D0
D1
Dn
n
tCEH
tCDS
tZ
HIGH-Z
5157 FHD F04
5157 FHD F05
Doc. No. 25019-0A 2/98 N-1
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