CAT24C164 Datasheet, PDF (5/16 Pages) Catalyst Semiconductor – 16-Kb CMOS Serial EEPROM, Cascadable

Figure 1. START/STOP Conditions
SCL
SDA
START
CONDITION
STOP
CONDITION
Figure 2. Slave Address Bits
1 A2 A1 A0 a10 a9 a8 R/W CAT24C164
CAT24C164
Figure 3. Acknowledge Timing
BUS RELEASE DELAY (TRANSMITTER)
SCL FROM
1
8
MASTER
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
ACK DELAY (≤ tAA)
BUS RELEASE DELAY (RECEIVER)
9
ACK SETUP (≥ tSU:DAT)
Figure 4. Bus Timing
tF
tHIGH
tR
tLOW
tLOW
SCL
tSU:STA
tHD:DAT
tHD:STA
tSU:DAT
SDA IN
SDA OUT
tAA
tDH
tSU:STO
tBUF
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
5
Doc No. 1118, Rev. A