CAT1232LP_06 Datasheet, PDF (5/12 Pages) Catalyst Semiconductor – 5V and 3.3V Supply Monitor, Watchdog Timer, Manual Reset, with Active High & Low Resets

CAT1232LP/CAT1832
APPLICATION INFORMATION
SUPPLY VOLTAGE MONITOR
Reset Signal Polarity and Output Stage Structure
RESET is an active LOW signal. It is developed with an
open drain driver in the CAT1232LP. A pull-up resistor
is required, typical values are 10kΩ to 50kΩ. The
CAT1832 uses a CMOS push-pull output stage for the
RESET.
RESET is an active High signal developed by a CMOS
push-pull output stage and is the logical opposite to
RESET.
Trip Point Tolerance Selection
The TOL input is used to select the V_CC trip point
threshold. This selection is made connecting the TOL
input to ground or V_CC. Connecting TOL to Ground
makes the V_CC trip threshold 4.62V for the CAT1232LP
and 2.88V for the CAT1832.
Connecting TOL to VCC makes the VCC trip threshold
4.37V for the CAT1232LP and 2.55V for the CAT1832.
After V_CC has risen above the trip point set by TOL,
RESET and RESET remain active for a minimum time
period of 250ms.
On power-down, once V_CC falls below the reset threshold
the RESET outputs will remain active and are guaranteed
valid down to a V_CC level of 1.0V.
Tolerance
Select
Voltage
CAT1232LP
TOL = VCC
CAT1232LP
TOL = GND
CAT1832
TOL = VCC
CAT1832
TOL = GND
Trip Point
Tolerance
10 %
5%
20 %
10 %
Trip Point Voltage (V)
MIN NOMINAL MAX
4.25
4.37
4.49
4.50
4.62
4.74
2.47
2.55
2.64
2.80
2.88
2.97
V_CC
V_CCTP(MIN)
t_R
V_C^V_CCTCPTP(MAX)
t_RPU
V_CC
V_CCTP(MAX)
V_CCTP
t_F
V_CCTP(MIN)
RESET
V_OH
RESET
t_RPD
V_{OL RESET}
Figure 1. Timing Diagram: Power Up
V_OH
RESET
V_OL
Figure 2. Timing Diagram: Power Down
Manual Reset Operation
Push-button input, PBRST, allows the user to issue
reset signals. The pushbutton input is debounced and is
pulled high through an internal 40kΩ resistor.
When PBRST is held low for the minimum time of 20 ms,
both resets become active and remain active for a
minimum time period of 250ms after PBRST returns
high.
No external pull-up resistor is required, since PBRST is
pulled high by an internal 40kΩ resistor.
PBRST can be driven from a TTL or CMOS logic line or
short-ed to ground with a mechanical switch.
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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Doc. No. 25089, Rev. 0C