CAT1163_0711 Datasheet, PDF (4/14 Pages) Catalyst Semiconductor – Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer (16K)

CAT1163
WRITE CYCLE LIMITS
Symbol Parameter
t_WR
Write Cycle Time
Min
Typ
Max
Units
10
ms
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave address.
RESET CIRCUIT CHARACTERISTICS
Symbol Parameter
t_GLITCH
V_RT
V_OLRS
V_OHRS
Glitch Reject Pulse Width
Reset Threshold Hystersis
Reset Output Low Voltage (I_OLRS=1mA)
Reset Output High Voltage
Reset Threshold (V_CC=5V)
(CAT1163-45)
Reset Threshold (V_CC=5V)
(CAT1163-42)
V_TH
Reset Threshold (V_CC=3.3V)
(CAT1163-30)
Reset Threshold (V_CC=3.3V)
(CAT1163-28)
Reset Threshold (V_CC=3V)
(CAT1163-25)
t_PURST
t_WP
t_RPD
V_RVALID
Power-Up Reset Timeout
Watchdog Period
V_TH to RESET Output Delay
RESET Output Valid
Min
Typ
15
V_CC - 0.75
4.50
Max
100
0.4
4.75
Units
ns
mV
V
V
4.25
4.50
3.00
3.15
V
2.85
3.00
2.55
2.70
130
270
ms
1.6
sec
5
µs
1
V
Doc. No. MD-3003 Rev. F
4
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice