CAT6217 Datasheet, PDF (2/10 Pages) Catalyst Semiconductor – 150mA CMOS LDO Regulator

CAT6217
PIN DESCRIPTIONS
Pin # Name Function
1 VIN Supply voltage input.
2 GND Ground reference.
3
EN
Enable input (active high); a 2.5MΩ
pull-down resistor is provided.
Optional bypass capacitor connection
4 BYP for noise reduction and PSRR
enhancing.
5 VOUT LDO Output Voltage.
BLOCK DIAGRAM
VIN
V_IN
EN
BYP
Reference
LDO
Shutdown
Switch
GND
VOUT
V_OUT
Figure 2. CAT6217 Functional Block Diagram
PIN FUNCTION
VIN is the supply pin for the LDO. A small 1μF
ceramic bypass capacitor is required between the V_IN
pin and ground near the device. When using longer
connections to the power supply, C_IN value can be
increased without limit. The operating input voltage
range is from 2.3V to 5.5V.
EN is the enable control logic (active high) for the regulator
output. It has a 2.5MΩ pull-down resistor, which
assures that if EN pin is left open, the circuit is disabled.
VOUT is the LDO regulator output. A small 1μF
ceramic bypass capacitor is required between the V_OUT
pin and ground for stability. For better transient
response, its value can be increased to 4.7μF.
The capacitor should be located near the device. ESR
domain is 5mΩ to 500mΩ. V_OUT can deliver a
maximum guaranteed current of 150mA. A 250Ω
internal shutdown switch discharges the output
capacitor in the no-load condition.
GND is the ground reference for the LDO. The pin
must be connected to the ground plane on the PCB.
BYP is the reference bypass pin. An optional 0.01μF
capacitor can be connected between BYP pin and
GND to reduce the output noise and enhance the
PSRR at high frequency.
ABSOLUTE MAXIMUM RATINGS ⁽¹⁾
Parameter
V_IN
V_EN, V_OUT
Junction Temperature, T_J
Power Dissipation, P_D
Storage Temperature Range, T_S
Lead Temperature (soldering, 5 sec.)
ESD Rating (Human Body Model)
Rating
Unit
0 to 6.5
V
-0.3 to V_IN+0.3
V
+150
°C
Internally Limited ⁽²⁾
mW
-65 to +150
°C
260
°C
3
kV
RECOMMENDED OPERATING CONDITIONS ⁽³⁾
Parameter
Range
V_IN
2.3 to 5.5
V_EN
0 to V_IN
Junction Temperature Range, T_J
-40 to +125
Package Thermal Resistance (SOT23-5), θ_JA
235
Typical application circuit with external components is shown on page 1.
Unit
V
V
°C
°C/W
Notes:
(1) Exceeding maximum rating may damage the device
(2) The maximum allowable power dissipation at any T_A (ambient temperature) is P_Dmax = (T_Jmax – T_A)/θ_JA. Exceeding the maximum allowable
power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.
(3) The device is not guaranteed to work outside its operating rating.
Doc. No. MD-4011 Rev. A
2
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice