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| CAT1163_07 Datasheet, PDF (2/14 Pages) Catalyst Semiconductor – Supervisory Circuits with I2C Serial Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer | |||
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CAT1163
BLOCK DIAGRAM
EXTERNAL LOAD
VCC
GND
DOUT
ACK
WORDADDRESS
BUFFERS
SENSEAMPS
SHIFT REGISTERS
COLUMN
DECODERS
SDA
START/STOP
LOGIC
XDEC
EEPROM
WP
CONTROL
LOGIC
RESET THRESHOLD OPTION
Part Dash
Number
-45
-42
-30
-28
-25
Minimum
Threshold
4.50
4.25
3.00
2.85
2.55
Maximum
Threshold
4.75
4.50
3.15
3.00
2.70
DATA IN STORAGE
HIGHVOLTAGE/
TIMING CONTROL
RESET Controller
STATE COUNTERS
SCL
Precision
WATCHDOG
Vcc Monitor
SLAVE
ADDRESS
COMPARATORS
WDI RESET RESET
ABSOLUTE MAXIMUM RATINGS(1)
Parameters
Temperature Under Bias
Storage Temperature
Voltage on any Pin with Respect to Ground(2)
VCC with Respect to Ground
Package Power Dissipation Capability (TA = 25°C)
Lead Soldering Temperature (10 secs)
Output Short Circuit Current(3)
Ratings
â55 to +125
â65 to +150
â2.0 to VCC + 2.0
â2.0 to 7.0
1.0
300
100
Units
ºC
ºC
V
V
W
ºC
mA
REABILITY CHARACTERISTICS
Symbol
NEND(4)
TDR(4)
VZAP(4)
ILTH(4)(5)
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-up
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
Min
1,000,000
100
2000
100
Max
Units
Cycles/Byte
Years
Volts
mA
Notes:
(1) Stresses above those listed under âAbsolute Maximum Ratingsâ may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The minimum DC input voltage is â0.5V. During transitions, inputs may undershoot to â2.0V for periods of less than 20ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
(5) Latch-up protection is provided for stresses up to 100mA on address and data pins from â1V to VCC +1V.
Doc. No. 3003 Rev. E
2
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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