CAT1026 Datasheet, PDF (12/20 Pages) Catalyst Semiconductor – Dual Voltage Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM

CAT1026, CAT1027
Acknowledge Polling
Disabling of the inputs can be used to take advantage of
the typical write cycle time. Once the stop condition is
issued to indicate the end of the host’s write opration, the
CAT1026 and CAT1027 initiate the internal write cycle.
ACK polling can be initiated immediately. This involves
issuing the start condition followed by the slave address
for a write operation. If the device is still busy with the
write operation, no ACK will be returned. If a write
operation has completed, an ACK will be returned and
the host can then proceed with the next read or write
operation.
Figure 11. Immediate Address Read Timing
Read Operations
The READ operation for the CAT1026 and CAT1027 is
initiated in the same manner as the write operation with
one exception, the R/W bit is set to one. Three different
READ operations are possible: Immediate/Current
Address READ, Selective/Random READ and
Sequential READ.
SCL
SDA
S
T
S
BUS ACTIVITY: ^A
SLAVE
T
MASTER ^R ADDRESS
O
T
P
SDA LINE S
P
A
N
C
DATA
O
K
A
C
K
8
9
8TH BIT
DATA OUT
NO ACK
STOP
Doc. No. 3010, Rev. K
12