CAT5409_08 Datasheet, PDF (1/16 Pages) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP™) with 64 Taps and I²C Interface

CAT5409
Quad Digitally Programmable Potentiometers
(DPP™) with 64 Taps and I²C Interface
FEATURES
„ Four linear taper digitally programmable
potentiometers
„ 64 resistor taps per potentiometer
„ End to end resistance 2.5kΩ, 10kΩ, 50kΩ or
100kΩ
„ I²C interface
„ Low wiper resistance, typically 80Ω
„ Four non-volatile wiper settings for each
potentiometer
„ Recall of saved wiper settings at power-up
„ 2.5 to 6.0 volt operation
„ Standby current less than 1µA
„ 1,000,000 nonvolatile WRITE cycles
„ 100 year nonvolatile memory data retention
„ 24-lead SOIC and 24-lead TSSOP
„ Write protection for data register
For Ordering Information details, see page 15.
PIN CONFIGURATION
SOIC (W)
TSSOP (Y)
DESCRIPTION
The CAT5409 is four Digitally Programmable
Potentiometers (DPP™) integrated with control logic
and 16 bytes of NVRAM memory.
A separate 6-bit control register (WCR) independently
controls the wiper tap position for each DPP.
Associated with each wiper control register are four
6-bit non-volatile memory data registers (DR) used for
storing up to four wiper settings. Writing to the wiper
control register or any of the non-volatile data
registers is via a I²C serial bus. On power-up, the
contents of the first data register (DR0) for each of the
four potentiometers is automatically loaded into its
respective wiper control register (WCR).
The Write Protection (¯W¯P¯) pin protects against
inadvertent programming of the data register.
The CAT5409 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications.
FUNCTIONAL DIAGRAM
R_H0
R_H1
R_H2
R_H3
SDA 1
A₁ 2
R_L1 3
R_H1 4
R_W1 5
GND 6
NC 7
R_W2 8
R_H2 9
R_L2 10
SCL 11
A₃ 12
24 WP
23 A₂
22 R_W0
21 R_H0
20 R_L0
19 V_CC
18 NC
17 R_L3
16 R_H3
15 R_W3
14 A₀
13 NC
V_{CC 1}
R_L0 2
R_H0 3
R_W0 4
A₂ 5
WP 6
SDA 7
A₁ 8
R_L1 9
R_H1 10
R_W1 11
GND 12
24 NC
SCL
SDA
23 R_L3
22 R_H3
WP
21 R_W3
A₀
A₁
20 A₀
A₂
A₃
19 NC
18 A₃
17 SCL
16 R_L2
15 R_H2
14 R_W2
13 NC
I²C BUS
WIPER CONTROL
INTERFACE
REGISTERS
R_W0
R_W1
NONVOLATILE
R_W2
CONTROL LOGIC
DATA
REGISTERS
R_W3
R_L0
R_L1
R_L2
R_L3
© Catalyst Semiconductor, Inc.
1
Characteristics subject to change without notice
Doc. No. MD-2010 Rev. K