CLM1117 Datasheet, PDF (3/4 Pages) Calogic, LLC – 800mA Low Dropout Regulator SCSI-II Active Terminator

CORPORATION
CLM1117
APPLICATION NOTES
EXTERNAL CAPACITOR
To ensure the stability of the CLM1117 an output capacitor of
at least 10µF (tantalum) or 50µF (aluminum) is required. The
value may change based on the application requirements on
the output load or temperature range. The capacitor equivalent
series resistance (ESR) will effect the CLM1117 stability. The
value of the ESR can vary from the type of capacitor used in
the applications. The recommended value for ESR is 0.5Ω.
The output capacitance could increase in size to above the
minimum value. The larger value of output capacitance as
high as 100µF can improve the load transient response.
SOLDERING METHODS
The CLM1117 SOT-223 package is designed to be compatible
with infrared reflow or vapor-phase reflow soldering techniques.
During soldering the non-active or mildly active fluxes may be
used. The CLM1117 die is attached to the heatsink lead
which exits opposite the input, output, and ground pins.
Hand soldering and wave soldering should be avoided since
these methods can cause damage to the device with
excessive thermal gradients on the package. The SOT-223
recommended soldering method are as follows: vapor phase
reflow and infrared reflow with the component preheated to
within 65^oC of the soldering temperature range.
THERMAL CHARACTERISTICS
The thermal resistance of CLM1117 is C^o/W from junction to
tab and 31 C^o/W from tab to ambient for a total of 46 C^o/W
from junction to ambient. The CLM1117 features the internal
thermal limiting to protect the device during overload
conditions. Special care needs to be taken during continuous
load conditions to insure the maximum junction temperature
does not exceed 125^oC.
Taking the FR-4 printed circuit board and 1/16 thick with 1
ounce copper foil as an experiment (fig.1 & fig.2), the PCB
material is effective at transmitting heat with the tab attached
to the pad area and a ground plane layer on the backside of
the substrate. Refer to table 1 for the results of the
experiment.
The thermal interaction from other components in the
application can effect the thermal resistance of the CLM1117.
TABLE 1.
TOTAL PC BOARD AREA
2500mm
2500mm
2500mm
2500mm
2500mm
1600mm
2500mm
2500mm
1600mm
900mm
900mm
TOPSIDE COPPER AREA
2500mm
1250mm
950mm
2500mm
1800mm
600mm
1250mm
915mm
600mm
240mm
240mm
FIGURE 1. CIRCUIT LAYOUT, THERMAL EXPERIMENTS
10V
+
10µF
CLM1117 - 2.85
2.85V
10µF
27KΩ
1N-13
FIGURE 2. SUBSTRATE LAYOUT FOR SOT-223
50 X 50mm
35 X 17mm
16 X 10mm
1N-14
The actual thermal resistance can be determined with
experimentation. CLM1117 power dissipation is calculated as
follows:
PD = (VIN - VOUT) (IOUT)
Maximum Junction Temperature Range:
TJ = Tambient (max) + PD (thermal resistance (Junction-to-ambient))
Maximum Junction Temperature must not exceed 125^oC.
PO = (10V - 2.85) (105mA) = (7.15) (105mA) = 750mW
BACKSIDE COPPER AREA
2500mm
2500mm
2500mm
0
0
1600mm
0
0
0
900mm
0
THERMAL RESISTANCE
JUNCTION TO AMBIENT
46^oC/W^o
47^oC/W^o
49^oC/W^o
51^oC/W^o
53^oC/W^o
55^oC/W^o
58^oC/W^o
59^oC/W^o
67^oC/W^o
72^oC/W^o
85^oC/W^o
CALOGIC CORPORATION, 237 Whitney Place, Fremont, California 94539, Telephone: [phone], FAX: [phone]