VN2222 Datasheet, PDF (2/2 Pages) Supertex, Inc – N-Channel Enhancement-Mode Vertical DMOS FETs

CORPORATION
VN2222 Series
SPECIFICATIONS^a
SYMBOL
PARAMETER
STATIC
V(BR)DSS Drain-Source Breakdown Voltage
VGS(th)
Gate-Threshold Voltage
IGSS
Gate-Body Leakage
TYP^b
70
2.3
IDSS
Zero Gate Voltage Drain Current
ID(ON)
On-State Drain Current^c
rDS(ON)
Drain-Source On-Resistance^c
gFS
Forward Transconductance^c
gOS
Common Source Output Conductance^c
DYNAMIC
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
SWITCHING
1000
5
2.5
4.4
230
1200
16
11
2
tON
Turn-On Time
7
tOFF
Turn-Off Time
7
Notes:
a. TA = 25^oC unless otherwise noted.
b. For design aid only, not subject to production testing.
c. Pulse test; PW = ≤300µS, duty cycle ≤2%.
LIMITS
MIN MAX
60
0.6
2.5
±100
10
500
750
7.5
7.5
13.5
100
60
25
5
10
10
UNIT
TEST CONDITIONS
ID = 100µA, VGS = 0V
V
VDS = VGS, ID = 1mA
nA VGS = ±20V, VDS = 0V
VDS = 48V, VGS = 0V
µA
TJ = 125^oC
mA VDS = 10V, VGS = 10V
VGS = 5V, ID = 0.2A
Ω
VGS = 10V, ID = 0.5A
TJ = 125^oC
mS VDS = 10V, ID = 0.5A
µS VDS = 10V, ID = 0.2A
pF VDS = 25V, VGS = 0V, f = 1MHz
VDD = 15V, RL = 23Ω, ID = 0.6A
VGEN = 10V, RG = 25Ω
ns
(Switching time is essentially independent of
operating temperature)