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| 3N172 Datasheet, PDF (2/2 Pages) Calogic, LLC – Diode Protected P-Channel Enhancement Mode MOSFET General Purpose Amplifier/Switch | |||
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CORPORATION
3N172 / 3N173
SMALL-SIGNAL ELECTRICAL CHARACTERISTICS TA = 25oC and Bulk (substrate) Lead Connected to Source
SYMBOL
PARAMETER
| yfs |
| yos |
Ciss
Crss
Coss
Magnitude of Small-Signal, Common-Source,
Short-Circuit, Forward Transadmittance*
Magnitude of Small-Signal, Common-Source,
Short-Circuit, Output Admittance*
Small-Signal, Common-Source, Short-Circuit,
Input Capacitance*
Small-Signal, Common-Source, Short-Circuit,
Reverse Transfer Capacitance*
Small-Signal, Common-Source, Short-Circuit,
Output Capacitance*
3N172
3N173
UNITS
MIN MAX MIN MAX
TEST CONDITIONS
1500 4000 1000 4000 µS VDS = -15V, ID = -10mA, f = 1kHz
250
250 µS VDS = -15V, ID = -10mA, f = 1kHz
3.5
3.5 pF VDS = -15V, ID = -10mA, f = 1MHz
1.0
1.0 pF VDS = -15V, ID = -10mA, f = 1MHz
3.0
3.0 pF VDS = -15V, ID = -10mA, f = 1MHz
NOISE CHARACTERISTICS
SYMBOL
PARAMETER
TYPICAL UNITS
TEST CONDITIONS
NF
Common-Source Spot Noise Figure
1.0
dB
VDS = -15V, ID = -1mA, f = 1kHz, RG = 1Mâ¦
SWITCHING CHARACTERISTICS TA = 25oC Bulk (substrate) Lead Connected to Source
SYMBOL
PARAMETER
3N172
MIN MAX
3N173
MIN MAX
UNITS
TEST CONDITIONS
td (on)
tr
Turn-On Delay Time*
Rise Time*
12
12
VDD = -15V, ID (on) = -10mA
24
24
ns RG = RL = 1.4kâ¦
toff
Turn-Off Delay Time*
50
50
See Test Circuit Below
*Registered JEDEC Data
SWITCHING TIME DETAIL
VDD
MEASUREMENTS ON SAMPLING OSCILLOSCOPE WITH
trise < 0.2ns
Cin < 2.0pF
Rin > 10Mâ¦
INPUT PULSE
trise < 2ns
PULSE WIDTH > 200ns
VIN
VOUT
10%
t4(on)
PULSE
WIDTH
50%
50%
90%
tr
toff
10%
90%
90%
-0V
-VIN
-1V
-15V
0210
RG
VIN
50â¦
RL
VOUT
D.U.T.
1000
500
100
50
10
5.0
1.0
-0.1
0220
SWITCHING TIMES vs. ON-STATE
DRAIN CURRENT
VDD = 15V
RG = RL = 1.4K
t off
t rise
td(on)
-0.5
-1.0
-5.0
-10
ON-STATE DRAIN CURRENT - (I D(on) ) - mA
0230
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