U401 Datasheet, PDF (1/2 Pages) Calogic, LLC – Dual N-Channel JFET Switch

Dual N-Channel JFET Switch
CORPORATION
U401 – U406
FEATURES
Minimum System Error and Calibration
• _{Low Drift With Temperature}
• _{Operates From Low Power Supply Voltages}
•• _{High Output Impedance}
PIN CONFIGURATION
TO-71
CJ2
S2 ^D2
G2
G1
D1 ^S1
ABSOLUTE MAXIMUM RATINGS
(TA = 25^oC unless otherwise specified)
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 50V
Gate Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Storage Temperature Range . . . . . . . . . . . . . -65^oC to +200^oC
Operating Temperature Range . . . . . . . . . . . -55^oC to +150^oC
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300^oC
Power Dissipation (TA = 85^oC)
Derate above 25^oC
One Side
300mW
2.6mW/ ^oC
Both Sides
500mW
5mW/ ^oC
NOTE: Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part
Package
U401-6 Hermetic TO-71
XU401-6 Sorted Chips in Carriers
Temperature Range
-55^oC to +150^oC
-55^oC to +150^oC