SD200DC_15 Datasheet, PDF (1/2 Pages) Calogic, LLC – High-Speed Analog N-Channel Enhancement-Mode

High-Speed Analog
N-Channel Enhancement-Mode
LLC
DMOS FETS
SD200 / SD201 / SD202 / SD203 / SSTSD201 / SSTSD203
FEATURES
High gain . . . . . . . . . . . . . . . . . . . . . 8.0 dB min @ 1 GHz
•• Low Noise. . . . . . . . . . . . . . . . . . . . . 5.0 dB max @ 1 GHz
(SD202, SD203, SSTSD203)
Low Interelectrode Capacitances
APPLICATIONS
High Gain VHF/UHF Amplifiers
• _Oscillators
•• _Mixers
PIN CONFIGURATION
DESCRIPTION
The SD200 series is manufactured utilizing Calogic’s
proprietary DMOS design and processing techniques. The
device is designed to operate well through 1 GHz while
maintaining excellent frequency response, power gain, and
low noise. The DMOS structure is an inherently low
capacitance and very high speed design resulting in a device
that bridges JFETS and GaAs products in performance
characteristics.
ORDERING INFORMATION
Part
SD200DC
SD201DC
SD202DC
SD203DC
SSTSD201
SSTSD203
XSD200
XSD201
XSD202
XSD203
Package
Temperature Range
4 Lead TO-52 Package
4 Lead TO-52 Package
4 Lead TO-52 Package
4 Lead TO-52 Package
Surface Mount SOT-143
Surface Mount SOT-143
Sorted Chips in Carriers
Sorted Chips in Carriers
Sorted Chips in Carriers
Sorted Chips in Carriers
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
SCHEMATIC DIAGRAM
CD10-1 SD201, SD203, zener protected
CD10-2 SD202, SD204, non-zener
CASE, B
G
S
D
GATE (3)
DRAIN (2)
BODY (4)
SOURCE (1)
SOT-143
PART MARKINGS (SOT-143)
P/N
MARKING
SSTSD201
201
SSTSD203
203
(3)
GATE
(2)
DRAIN
(4)
CASE, BODY
(1)
SOURCE
BODY INTERNALLY CONNECTED TO CASE.
DIODE PROTECTION ON SD201/SD203 ONLY.
CALOGIC LLC, 237 WHITNEY PLACE, FREMONT, CA 94539, 510-656-2900 PHONE, 510-651-1076 FAX
DS054 REV A