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CWB308 Datasheet, PDF (1/7 Pages) Calogic, LLC – CMOS/DMOS Quad Monolithic SPST Wide Band Analog Switches
CORPORATION
CMOS/DMOS
Quad Monolithic SPST
Wide Band Analog Switches
CWB308 / CWB309
FEATURES
Low Insertion Loss . . . . . . . . . . . . . 0.9 x DC @ 100MHz
• Low Channel-to-Channel Crosstalk. . . . . . . . . . . . -80dB
• High OFF Isolation . . . . . . . . . . . . . . . . . 68dB @ 10MHz
• Fast Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . <140ns
•• Low ON Resistance . . . . . . . . . . . . . . . . . . . . . . 40Ω (typ)
APPLICATIONS
High Speed Multiplexing
• RF & Video Switches
• Sample and Hold Switches
• Track and Hold Switches
•• Computer Peripherals
DESCRIPTION
The Calogic CWB308 and CWB309 feature fast switching
(<140ns) and low ON resistance (<40Ω) for excellent
performance in applications in communications, computer
peripherals and instrument controls. This series combines
low power CMOS input logic and level translation circuitry with
high speed, low capacitance DMOS switches in a monolithic
structure. The CWB308 and CWB309 have CMOS
compatible inputs and also have a standard pin configuration
for second sourcing.
ORDERING INFORMATION
Part
CWB308CP
CWB308CY
XCWB308
CWB309CP
CWB309CY
XCWB309
Package
Temperature Range
Plastic 16-Pin Dip
0 to +85oC
Plastic SO-16 Surface Mount 0 to +85oC
Sorted Chips in Carriers
0 to +85oC
Plastic 16-Pin Dip
0 to +85oC
Plastic SO-16 Surface Mount 0 to +85oC
Sorted Chips in Carriers
0 to +85oC
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAMS
IN1 1
D1 2
S1 3
V- 4
GND 5
S4 6
D4 7
IN4 8
SO-16
16-PIN DIP
16 IN2 IN1 1
15 D2
D1 2
14 S2
S1 3
13 V+
V- 4
12 N/C GND 5
11 S3
S4 6
10 D3
D4 7
9 IN3 IN4 8
16 IN2
IN 1
15 D2
14 S2
IN 2
13 V+
12 N/C
IN 3
11 S3
10 D3
IN 4
9 IN3
CWB308
CWB309
S1
S1
IN 1
D1
D1
S2
S2
IN2
D2
D2
S3
S3
IN3
D3
D3
S4
S4
IN4
D4
D4
CWB
TOP VIEW
CWB308CY
CWB309CY
TOP VIEW
CWB308CP
CWB309CP
Four SPST Switches per Package.
Switches shown in Logic '1' Input Position.
LOGIC TABLE
Logic
0
1
CWB308
OFF
ON
CWB309
ON
OFF
All devices contain diodes to protect inputs against damage due
to high static voltages or electric fields; however, it is advised that
precautions be taken not to exceed the maximum recommended
input voltages. All unused inputs must be connected to an
appropriate logic level (either Vcc or GND).